Implementing a Histogram Equalization Algorithm in Reconfigurable Hardware

نویسنده

  • Stephanie Parker
چکیده

Dedicated hardware can be used when images and video are acquired and processed. In this paper, a histogram equalization algorithm is written in a Hardware Description Language for future implementation in reconfigurable hardware. The goal of this project is to implement a histogram equalization algorithm using VHDL for a real-time processing system on a Field Programmable Gate Array (FPGA). The histogram equalization algorithm was implemented and tested using a known 4 x 4 array. The array was initially coded in MATLAB and then converted to VHDL, which describes the behavior and structure of electronics systems. The algorithm was later tested using Forward Looking Infrared (FLIR) images. The simulated speed of the VHDL implementation was 0.020 ns vs. 0.053 ms in MATLAB. In conclusion, the histogram equalization has been successfully implemented in VHDL using Xilinx ISE, MATLAB and ModelSim.

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تاریخ انتشار 2011